EDA Tools Automates Logic Design for MCU-based Systems
FREMONT, Calif.----Sept. 5, 2000--Waferscale
Integration today introduced it new PSDsoft 2000 EDA tool that
automates the configuration of the programmable logic and memory on
its EasyFLASH(TM) PSD devices. EasyFLASH PSDs provide external flash
memory, SRAM, I/O and programmable logic to 8-, 16- and 32-bit
microcontrollers from Infineon, Motorola, Intel, Philips, Hitachi, and
others. PSDsoft 2000 provides a completely automated programmable
logic design flow for the PSD's microcontroller interface, memory
mapping, chip selects, pin assignments, and custom peripherals, such
as state machines, counters or shifters. The tool automatically cross
checks for system and logic errors (a common source of problems in
MCU-based designs with external devices), and then merges the logic
design with the microcontroller firmware.
PSDsoft 2000 provides HDL designs of commonly used MCU
peripherals, including comparators, decoders, multiplexers, tri-state
buffers, shifters, state machines, and counters from pop-up menus in
the tool. Designers can drag and drop these peripherals into their
logic design, using them as-is or modifying them to fit their
application. The tool also provides over forty ready-to-use templates
with the memory map of commonly used microcontrollers that can be
implemented in any PSD device. Frequently, these templates can be used
without modification as the design for the customer's application.
Natural Extension of PSDsoft Express
According to David Raun, Waferscale's Vice President of marketing,
``PSDsoft 2000 expands the capabilities of our popular PSDsoft Express
tool that supports PSDs with simple PLDs. Since PSDsoft Express's
introduction in January of this year, over 4000 customers have
downloaded the tool. Waferscale has received hundreds of positive
comments about its intuitive user interface and ease of use for PLD
design.
``The immense popularity of the point-and-click design flow in
PSDsoft Express prompted us to expand to tool to support our entire
line of PSD products. PSDsoft 2000 provides the same point-and-click
logic design for PSD products with complex PLDs, like the PSD8XX and
PSD4000.''
Waferscale customer, Ty Fannon of Mangiapane Computer Controls,
Inc. said of the software, ``I have taken a look at the PSDsoft package
and I must say it is really one of the more intuitive packages I have
seen for PLD design. Building a processor interface has never been so
effortless, incorporating ease of use with design functionality.''
Additional customer quotes can be found on Waferscale's web site
at www.waferscale.com.
Designing Embedded Systems with External Flash Memory
System firmware has become the main means of implementing the
differentiating features of end-products. In addition, more and more
applications, such as embedded automotive diagnostic systems or
medical monitoring systems, store large amounts of data that must be
updated during system operation. As a result, the amount of in-system
programmable (ISP) flash memory required for these systems frequently
outstrips that which is available on single-chip microcontrollers,
very few of which integrate more than 128 KBytes.
Each microcontroller architecture uses different signals for its
bus interface. As a result, external memory always requires the
addition of programmable logic to define the interface to the MCU's
address and bus lines. If the program code or data need to be updated
while the application is running, the design can become very complex
because microcontrollers cannot execute code from external flash
memory while they are updating it. Special logic for address decoding,
paging, and memory segment swapping must be designed to support
in-application programming. PSDsoft 2000 completely automates the
logic design of these functions in the PSD.
Three Design Flows
PSDsoft offers three options for designing PSD logic. The simplest
option is the Design Assistant mode for simple designs that use
combinatorial and simple sequential logic. The Design Assistant guides
the designer through the point-and-click design flow and automatically
generates all of the logic equations for pin assignments, system
memory map, combinatorial and sequential general purpose logic. The
designer does not need to know any HDL code to use this option.
The second option, the Extended Design Assistant, gives the user
access to an HDL editor that can be used to design custom logic from
scratch or to modify HDL templates of frequently used MCU peripherals
provided by the tool, such as state machines, complex counters,
shifters and comparators.
The third, or Template, option uses pre-defined memory maps and
pin assignments developed by Waferscale for specific processors, like
the Infineon C167, Philips P51XA, or Motorola's 68HC and 683XX
architectures. Most templates have supporting application notes and
can frequently be used with Waferscale's PSD development boards. The
designer may edit templates as needed in PSDsoft 2000's HDL editor.
Frequently, a template can be used as-ins for the customer's
application.
Microcontroller Interface Design
PSDsoft 2000 has pull down menus with the architectures for over
180 microcontrollers from eleven different vendors. PSDsoft 2000
presents any special options that are available for the selected
controller (e.g. muxed or non-muxed operation or 8-bit vs.16-bit
operation). Once the designer selects the appropriate options, the
tool automatically generates all the appropriate logic equations to
interface the PSD logic and memory to the selected microcontroller.
Changing to a different microcontroller architecture is as easy as
clicking on the name of the new device. PSDsoft automatically and
instantaneously re-generates the logic for the MCU interface.
Pin Assignments
PSDsoft 2000 provides a dialog box for the graphical assignment of
the I/O pins. All required pin connections to the selected MCU are
pre-selected when the dialog box appears and are protected from
modification. The remaining pins are assigned by clicking on them,
naming them, and defining their function in a text entry box on the
right. Pins may be used as PLD inputs (logic or latched address), PLD
outputs (external chip select), MCU I/O, latched address out,
dedicated JTAG, or other specialty functions. Only those functions
that are available to a particular pin are shown when that pin is
selected. For example, some pins can be used for JTAG ISP while others
may not. The JTAG ISP option is shown only for those pins that can use
it.
Page Register Definition
PSDsoft 2000 provides a point-and-click menu for the graphical
definition of the PSD's eight page bits that are used for memory
paging, logic or both. The designer simply clicks on the appropriate
option to allow external memory to be paged or swapped on a
page-by-page basis at any address boundary. Signal qualifiers can be
specified in a text box beside each register definition. This feature
is useful for in-application programming, for swapping memory in
systems with MCUs that have a limited number of address lines (e.g.
8051), or to save microcontroller I/O pins that would otherwise be
used for address lines. PSDsoft 2000 relieves the designer of the task
of writing fairly complex firmware to perform these funcittions.
Chip Selects
A chip-select dialog box allows the designer to define the system
memory map in a point-and-click fashion. Beginning and ending system
addresses and signal qualifiers for both internal PSD memory and
external system memories are written in a text box to the right of
each chip-select.
Internal Logic Nodes
PSDsoft 2000 will construct buried logic nodes that are directly
accessible by the microcontroller when the designer simply clicks on
this option. The initial declarations and equations for the buried
logic nodes are typed in a box to the right of the description of each
combinatorial or registered logic element to be used for this purpose.
Buried logic nodes are ideal for the creation of loadable counters and
shift registers because all MCU access is handled directly, in the
silicon. Buried nodes can also be used for state machines,
comparators, or even intermediate logic nodes to implement larger and
more complex logic designs. The logic equations for buried logic nodes
may be edited in the HDL editor, as well as in graphical
user-interface for logic node definition.
I/O Equations
Signals that have been designated as registered or combinatorial
I/O in the Pin Definition screen also appear in an I/O Equations
screen. Their logic functions can be defined by simply clicking on the
appropriate Boolean logic operators and signal qualifiers or they may
be typed by the designer. PSDsoft 2000 will not allow a designer to
implement any illegal logic operation.
Automatic Flash Programming Code Generation
PSDsoft 2000 automatically generates the low-level MCU-specific
C-code functions and coded examples that control in-application
programming of the flash memories on the PSD device. This process
relieves the designer of the need to hand code these routines. The
resulting code can be folded into the designer's application code.
Cross-checking
When the designer is done, PSDsoft 2000 checks for mistakes
including overlapping or invalid memory addresses, invalid logic
operations, or signals that don't exist because their names were
mistyped. During the entire process, PSDsoft 2000 has been
automatically writing HDL equations for the PSD logic. Once this is
done, the designer may manually edit the HDL file to include state
machine equations and other complex logic. If the designer goes back
and changes any aspect of the design, such as whether the MCU is muxed
or non-muxed, or changes a pin definition, PSDsoft 2000 will
automatically and invisibly re-write all the relevant code. Any
project-specific HDL statements the designer has written will not be
affected by the automatic re-write because they are located in a
``preserved'' area.
A security bit dialog box allows the user to set a security bit on
the PSD device that prevents unauthorized reading or copying of the
PSD's contents by scrambling the system and user code for the JTAG
(IEEE 1149.1) protocol.
Merging MCU Firmware
PSDsoft 2000 then maps the design, creates the fuse map, and
issues a fitter report with pin definitions, chip selects, internal
logic nodes, and I/O logic. An address translator dialog box appears
that lets the designer browse to locate the firmware file names
containing the MCU firmware to be merged into the PSD design. The
software automatically verifies all addresses and prevents any overlap
between logic and memory addresses.
Programming
The PSD device can be programmed, in the system, in less than 10
seconds via the PSD's ISP JTAG port, using Waferscale's FlashLINK
Programmer. PSDsoft 2000 provides a dialog box for the interactive
specification of a JTAG chain that supports in-system programmable
parts from other vendors, including Xilinx, Altera and Lattice, as
well as the PSD.
Pricing and Availability
PSDsoft 2000 is available now for $89. It can be purchased
directly from Waferscale's web site or through Waferscale``s sales
representatives and franchised distributors.
Waferscale's World Wide Web site is www.waferscale.com.
Waferscale Integration, Inc. is the leading supplier of highly
integrated programmable solutions for high-speed embedded control
designs. Its PSD families of single-chip, field-programmable
microcontroller peripherals off-load microcontroller functions so that
MCUs can operate faster and do more. The power-conserving features of
PSD devices can extend system battery life by several hours. The
company's family of high performance, non-volatile memory products
offers densities of 16 Kbit to 1 Megabit with access times as low as
25 ns and 3.3 volt devices with access times as low as 70 ns.
Waferscale is located in Fremont, California.
PSDsoft, EasyFLASH and FlashLINK are trademark of Waferscale
Integration, Inc. Windows is a registered trademark of Microsoft
Corporation. ABEL is a registered trademark of MINC.
Contact:
Waferscale Integration
David Raun
510-856-6192
draun@wsiusa.com
or
The William Baldwin Group
Nancy B. Green
650-856-6192
nancybgreen@william-baldwin.com
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